In the current state of integrated circuit technology, an integrated circuit device will often be in the form of a chip. Such a chip will sometimes be mounted onto a leadframe or carrier substrate for forming a package. Bond pads located on the chip may be used for electrically interconnecting the chip with the leadframe/carrier substrate. The bond pad structures, however, generally consume a fair amount of space. Resultantly, the size and cost of a package incorporating the chip, as well as on the system level board, may also be affected. In the drive to provide increasingly smaller device and product sizes, reducing the spacing impact of these devices is of substantial importance.